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Microprocessors and microcomputer-based system design
- Author / Creator
- Available as
- Online
- Physical
- Summary
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Microprocessors and Microcomputer-Based System Design, Second Edition, builds on the concepts of the first edition. It discusses the basics of microprocessors, various 32-bit microprocessors, the 8...
Microprocessors and Microcomputer-Based System Design, Second Edition, builds on the concepts of the first edition. It discusses the basics of microprocessors, various 32-bit microprocessors, the 8085 microprocessor, the fundamentals of peripheral interfacing, and Intel and Motorola microprocessors. This edition includes new topics such as floating-point arithmetic, Program Array Logic, and flash memories. It covers the popular Intel 80486/80960 and Motorola 68040 as well as the Pentium and PowerPC microprocessors. The final chapter presents system design concepts, applying the design principles covered in previous chapters to sample problems.
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- Creator
- Mohamed Rafiquzzaman
- Format
- Books
- Language
- English
- Publication
-
- 2nd ed
- Boca Raton, Florida : CRC Press, [1995]
- ©1995
- Physical Details
-
- 1 online resource (793 pages)
- ISBNs
- 9781000102963, 9781000141467, 9780849344756, 1000102963, 1003068146, 1000141462, 0849344751, 9781003068143
- OCLC
- on1291628438, on1283852852, ocm32091416, on1295194346
- INTRODUCTION TO MICROPROCESSORS AND MICROCOMPUTER-BASED APPLICATIONS, Evolution of the Microprocessor, Microprocessor Data Types, Microcomputer System Software and Programming Concepts, Typical Microcomputer Addressing Modes and Instructions, Basic Features of Microcomputer Development Systems, System Development Flowchart, Typical Microprocessors, Typical Practical Applications, Questions and Problems, INTEL 8085, Introduction, Register Architecture, Memory Addressing, 8085 Addressing Modes, 8085 Instruction Set, Timing Methods, 8085 Pins and Signals, 8085 Instruction Timing and Execution, 8085-Based System Design, Questions and Problems, INTEL 8086, Introduction, 8086 Architecture, 8086 Addressing Modes, 8086 Instruction Set, 8086 Assembler-Dependent Instructions, ASM-86 Assembler Directives, 8086 Programmed I/O, 8086-Based Microcomputer, 8086 Interrupt System, 8086 DMA, Questions and Problems, INTEL 80186/80286/80386, Intel 80186 and 80286, 80386 System Design, Coprocessor Interface, Questions and Problems, MOTOROLA MC68000, Introduction, 68000 Programming Model, 68000 Addressing Structure, 68000 Addressing Modes, 68000 Instruction Set, 68000 Stacks, 68000 Pins and Signals, 68000 System Diagram, Timing Diagrams, 68000 Memory Interface, 68000 Programmed I/O, 68000/2716/6116/6821-Based Microcomputer, 68000 Interrupt I/O, 68000 DMA, 68000 Exception Handling, Multiprocessing with the 68000 Using the TAS Instruction and as Signal, Questions and Problems, MOTOROLA MC68020, Introduction, Programming Model, Data Types, Organization, and CPU Space Cycle, MC68020 Addressing Modes, 68020 Instructions, 68020 Advanced Instructions, MC68020 Cache/Pipelined Architecture and Operation, MC68020 Virtual Memory, MC68020 Coprocessor Interface, MC68020 Pins and Signals, MC68020 Timing Diagrams, Exception Processing, MC68020 System Design, Questions and Problems, MOTOROLA MC68030/MC68040, INTEL 80486, AND PENTIUM MICROPROCESSORS, Motorola MC68030, MC68040, Intel 80486 Microprocessor, Intel Pentium Microprocessor, Questions and Problems, RISC MICROPROCESSORS: INTEL 80960, MOTOROLA MC88100, AND POWERPC, Basics of RISC, Intel 80960, Motorola MC88100 RISC Microprocessor, IBM/Motorola PowerPC, Questions and Problems, PERIPHERAL INTERFACING, Keyboard Interface, DMA Controllers, Printer Interface, Coprocessors, Questions and Problems, DESIGN PROBLEMS, Design Problem No. 1, Design Problem No. 2, Design Problem No. 3, Questions and Problems, APPENDICES, HP 64000, Motorola MC68000 and Support Chips-Data Sheets, Intel 8085, 8086, and Support Chips-Data Sheets, MC68000 Instruction Execution Times, 8086 Instruction Set Reference Data, Glossary, Bibliography.
- Includes bibliographical references (pages 755-758) and index.
- Cover -- Title Page -- Copyright Page -- Preface -- The Author -- Dedication -- Table of Contents -- Chapter 1: Introduction to Microprocessors and Microcomputer-Based Applications -- 1.1 Evolution of the Microprocessor -- 1.2 Microprocessor Data Types -- 1.2.1 Unsigned and Signed Binary Integers -- 1.2.2 BCD (Binary Coded Decimal) Numbers -- 1.2.3 ASCII -- 1.2.4 Floating-Point Numbers -- 1.3 Microcomputer Hardware -- 1.3.1 The System Bus -- 1.3.2 The Microprocessor -- 1.3.3 Memory Organization -- 1.3.3.a Introduction -- 1.3.3.b Main Memory Array Design -- 13.3.c Memory Management Concepts -- 1.3.3.d Cache Memory Organization -- 1.3.4 Input/Output (I/O) -- 1.3.4.a Programmed I/O -- 1.3.4.b Standard l/O Versus Memory-Mapped l/O -- 1.3.4.c Unconditional and Conditional Programmed I/O -- 1.3.4.d Typical Microcomputer Output Circuit -- 1.3.4.e Interrupt Driven I/O -- 1.3.4.f Direct Memory Access (DMA) -- 1.3.4.g Summary of Microcomputer I/O Methods -- 1.3.4.h Coprocessors -- 1.4 Microcomputer System Software and Programming Concepts -- 1.4.1 System Software -- 1.4.2 Programming Concepts -- 1.4.2.a Assembly Language Programming -- 1.4.2.b High-Level Language Programming -- 1.4.2.c Which Programming Language to Choose? -- 1.5 Typical Microcomputer Addressing Modes and Instructions -- 1.5.1 Introduction -- 1.5.2 Addressing Modes -- 1.5.3 Instruction Types -- 1.6 Basic Features of Microcomputer Development Systems -- 1.7 System Development Flowchart -- 1.7.1 Software Development -- 1.7.2 Hardware Development -- 1.8 Typical Microprocessors -- 1.9 Typical Practical Applications -- 1.9.1 Personal Workstations -- 1.9.2 Fault-Tolerant Systems -- 1.9.3 Real-Time Controllers -- 1.9.4 Robotics -- 1.9.5 Embedded Control -- Questions and Problems -- Chapter 2: Intel 8085 -- 2.1 Introduction -- 2.2 Register Architecture -- 2.3 Memory Addressing
- 2.4 8085 Addressing Modes -- 2.5 8085 Instruction Set -- 2.6 Timing Methods -- 2.7 8085 Pins and Signals -- 2.8 8085 Instruction Timing and Execution -- 2.8.1 Basic System Timing -- 2.8.2 8085 Memory READ (IO/M = 0, RD = 0) and I/O READ (10/M = I, RD = 0) -- 2.8.3 8085 Memory WRITE (10/M = 0, WR = O) and I/O WRITE (10/M = 1, WR = 0) -- 2.9 8085 Input/Output (I/O) -- 2.9.1 8085 Programmed I/O -- 2.9.1.a 8355/8755 I/O Ports -- 2.9.1.b 8155/8156 I/O Ports -- 2.9.2 8085 Interrupt System -- 2.9.3 8085 DMA -- 2.9.4 8085 SID and SOD Lines -- 2.10 8085-Based System Design -- Questions and Problems -- Chapter 3: Intel 8086 -- 3.1 Introduction -- 3.2 8086 Architecture -- 3.3 8086 Addressing Modes -- 3.3.1 Addressing Modes for Accessing Immediate and Register Data (Register and Immediate Modes) -- 3.3.1.a Register Addressing Mode -- 3.3.1.b Immediate Addressing Mode -- 3.3.2 Addressing Modes for Accessing Data in Memory (Memory Modes) -- 3.3.2.a Direct Addressing Mode -- 3.3.2.b Register Indirect Addressing Mode -- 3.3.2.c Based Addressing Mode -- 3.3.2.d Indexed Addressing Mode -- 3.3.2.e Based Indexed Addressing Mode -- 3.3.2.f String Addressing Mode -- 3.3.3 Addressing Modes for Accessing I/O Ports (I/O Modes) -- 3.3.4 Relative Addressing Mode -- 3.3.5 Implied Addressing Mode -- 3.4 8086 Instruction Set -- 3.5 8086 Assembler-Dependent Instructions -- 3.6 ASM-86 Assembler Directives -- 3.6.1 SEGMENT and ENDS Directives -- 3.6.2 Assume Directive -- 3.6.3 DUP Directive -- 3.7 System Design Using the 8086 -- 3.7.1 Pins and Signals -- 3.7.2 8086 Basic System Concepts -- 3.7.2.a 8086 Bus Cycle -- 3.7.2.b 8086 Address and Data Bus Concepts -- 3.7.3 Interfacing with Memories -- 3.7.3.a ROM and EPROM -- 3.7.3.b Static RAMs -- 3.7.3.c Dynamic RAMs -- 3.7.4 8086 Programmed I/O -- 3.8 8086-Based Microcomputer -- 3.9 8086 Interrupt System
- 3.9.1 Predefined Interrupts (0 to 4) -- 3.9.2 User-Defined Software Interrupts -- 3.9.3 User-Defined Hardware (Maskable Interrupts, Type Codes 3210 - 25510) -- 3.10 8086 DMA -- Questions and Problems -- Chapter 4: Intel 80186/80286/80386 -- 4.1 Intel 80186 and 80286 -- 4.1.1 Intel 80186 -- 4.1.2 Intel 80286 -- 4.1.2.a 80286 Memory Management -- 4.1.2.b Protection -- 4.12.c 80286 Exceptions -- 4.2 Intel 80386 -- 4.2.1 Basic 80386 Programming Model -- 4.2.1.a Memory Organization and Segmentation -- 4.2.1.b Data Types -- 4.2.1.c 80386 Registers -- 4.2.1.d 80386 Addressing Modes -- 4.2.2 80386 Instruction Set -- 4.2.2.a Arithmetic Instructions -- 4.2.2.b Bit Manipulation Instructions -- 4.2.2.c Byte-Set-On Condition Instructions -- 4.2.2.d Conditional Jumps and Loops -- 4.2.2.e Data Transfer -- 4.2.2.f Flag Control -- 4.2.2.g Logical -- 4.2.2.h String -- 4.2.2.i Table Look-Up Translation Instruction -- 4.2.2.j High-Level Language Instructions -- 4.2.3 Memory Organization -- 4.2.4 I/O Space -- 4.2.5 80386 Interrupts -- 4.2.6 80386 Reset and Initialization -- 4.2.7 Testability -- 4.2.8 Debugging -- 4.2.9 80386 Pins and Signals -- 4.2.10 80386 Bus Transfer Technique -- 4.2.11 80386 Read and Write Cycles -- 4.2.12 80386 Modes -- 4.2.12.a 80386 Real Mode -- 4.2.12.b Protected Mode -- 4.2.1.2.c Virtual 8086 Mode -- 4.3 80386 System Design -- 4.3.1 80386 Memory Interface -- 4.3.2 80386 I/O -- 4.4 Coprocessor Interface -- 4.4.1 Coprocessor Hardware Concepts -- 4.4.2 Coprocessor Registers -- 4.4.3 80387 Instructions -- Questions and Problems -- Chapter 5: Motorola MC68000 -- 5.1 Introduction -- 5.2 68000 Programming Model -- 5.3 68000 Addressing Structure -- 5.4 68000 Addressing Modes -- 5.4.1 Register Direct Addressing -- 5.4.2 Address Register Indirect Addressing -- 5.4.3 Absolute Addressing -- 5.4.4 Program Counter Relative Addressing
- 5.4.5 Immediate Data Addressing Mode -- 5.4.6 Implied Addressing -- 5.5 68000 Instruction Set -- 5.5.1 Data Movement Instructions -- 5.5.1.a MOVE Instructions -- 5.5.1.b EXG and SWAP Instructions -- 5.5.1.c LEA and PEA Instructions -- 5.5.1.d LINK and UNLK Instructions -- 5.5.2 Arithmetic Instructions -- 5.5.2.a Addition and Subtraction Instructions -- 5.5.2.b Multiplication and Division Instructions -- 5.5.2.c Compare, Clear, and Negate Instructions -- 5.5.2.d Extended Arithmetic Instructions -- 5.5.2.e Test Instructions -- 5.5.2.f Test and Set Instruction -- 5.5.3 Logical Instructions -- 5.5.4 Shift and Rotate Instructions -- 5.5.5 Bit Manipulation Instructions -- 5.5.6 Binary-Coded Decimal Instructions -- 5.5.7 Program Control Instructions -- 5.5.8 System Control Instructions -- 5.6 68000 Stacks -- 5.7 68000 Pins and Signals -- 5.7.1 Synchronous and Asynchronous Control Lines -- 5.7.2 System Control Lines -- 5.7.3 Interrupt Control Lines -- 5.7.4 DMA Control Lines -- 5.7.5 Status Lines -- 5.8 68000 System Diagram -- 5.9 Timing Diagrams -- 5.10 68000 Memory Interface -- 5.11 68000 Programmed I/O -- 5.11.1 68000-68230 Interface -- 5.11.2 Motorola 68000-6821 Interface -- 5.12 68000/2716/6116/6821-Based Microcomputer -- 5.13 68000 Interrupt I/O -- 5.13.1 External Interrupts -- 5.13.2 Internal Interrupts -- 5.13.3 68000 Exception Map -- 5.13.4 68000 Interrupt Address Vector -- 5.13.5 An Example of Autovector and Nonautovector Interrupts -- 5.14 68000 DMA -- 5.15 68000 Exception Handling -- 5.16 Multiprocessing with the 68000 Using theTAS Instruction and AS (Address Strobe) Signal -- Questions and Problems -- Chapter 6: Motorola MC68020 -- 6.1 Introduction -- 6.2 Programming Model -- 6.3 Data Types, Organization, and CPU Space Cycle -- 6.4 MC68020 Addressing Modes -- 6.4.1 Address Register Indirect (ARI) with Index and 8-Bit Displacement
- 6.4.2 ARI with Index (Base Displacement, bd: Value 0 or 16 Bits or 32 Bits) -- 6.4.3 Memory Indirect -- 6.4.4 Memory Indirect with PC -- 6.4.4.a PC Indirect with Index (8-Bit Displacement) -- 6.4.4.b PC Indirect with Index (Base Displacement) -- 6.4.4.c PC Indirect (Postindexed) -- 6.4.4.d PC Indirect (Preindexed) -- 6.5 68020 Instructions -- 6.5.1 New Privileged Move Instruction -- 6.5.2 Return and Delocate Instruction -- 6.5.3 CHK/CHK2 and CMP/CMP2 Instructions -- 6.5.4 Trap On Condition Instructions -- 6.5.5 Bit Field Instructions -- 6.5.6 Pack and Unpack Instructions -- 6.5.7 Multiplication and Division Instructions -- 6.5.8 MC68000 Enhanced Instructions -- 6.6 68020 Advanced Instructions -- 6.6.1 Breakpoint Instruction -- 6.6.2 Call Module/Return from Module Instructions -- 6.6.3 CAS lnstuctions -- 6.6.4 Coprocessor Instructions -- 6.7 MC68020 Cache/Pipelined Architecture and Operation -- 6.8 MC68020 Virtual Memory -- 6.9 MC68020 Coprocessor Interface -- 6.9.1 MC68881 Floating-Point Coprocessor -- 6.9.1.a 68881 Data Movement Instructions -- 6.9.1.b Monadic -- 6.9.1.c Dyadic Instructions -- 6.9.1.d BRANCH, Set, or Trap-On Condition -- 6.9.1.e Miscellaneous Instructions -- 6.9.2 MC68851 MMU -- 6.10 MC68020 Pins and Signals -- 6.11 MC68020 Timing Diagrams -- 6.12 Exception Processing -- 6.13 MC68020 System Design -- Questions and Problems -- Chapter 7: Motorola MC68030/MC68040, Intel 80486 and Pentium Microprocessors -- 7.1 Motorola MC68030 -- 7.1.1 MC68030 Block Diagram -- 7.1.2 MC68030 Programming Model -- 7.1.3 MC68030 Data Types, Addressing Modes, and Instructions -- 7.1.3.a PMOVE Rn, (EA) or (EA), Rn -- 7.1.3.b PTEST -- 7.1.3.c PLOAD -- 7.1.3.d PFLUSH -- 7.1.4 MC68030 Cache -- 7.1.5 68030 Pins and Signals -- 7.1.6 MC68030 Read and Write Timing Diagrams -- 7.1.7 MC68030 On-Chip Memory Management Unit -- 7.1.7.a MMU Basics
- 7.1.7.b 68030 On-Chip MMU